Brandon Malatest, Co-founder and COO
Per Vices Corp.
Today’s wireless systems need to be more complex than ever to accommodate new standards, protocols, and spectrum becoming available. This in turn has led to the the development of different dedicated systems for specific applications and protocols, resulting in problems of constant integration and hardware replacements costing more than ever. Software defined radio (SDR) can help to address these inefficiencies by offering a single, flexible wireless system capable of operating across multiple frequency bands and protocols. These commercial-off-the-shelf (COTS) SDRs offer a solution but are not without their own complexity in design.
SDR users benefit from increased performance and flexibility across the wireless spectrum, but designers must carefully design for their markets. The main challenges faced in these designs are tightly coupled and include:
- Designing for wideband operation;
- Determining which type of processor and what functionality to enable on it; and
- Selecting and implementing an appropriate digital backhaul.
Designing for Wideband Operation
RF integrated circuits (ICs), such as amplifiers, attenuators, mixers, etc., are an integral part in the design of any wireless system. Many ICs are designed for optimal performance within a limited frequency band, which can create complications for wideband systems like SDRs. To address this concern, different architectures can be utilized with the two most common being the use of complete transceiver ICs (such as the AD9375 by Analog Devices or LMS7002 by Lime Microsystems) or designing different radio chains for different frequency bands as illustrated in Figure 1. Both designs have merit with different advantages for each but having different radio chains typically allows for better performance and the ability to further extend into higher frequency bands with fewer changes to the design and therefore reducing risk and time to market.
Digital Signal Processing (DSP) for SDR
The architecture for SDR systems typically includes a radio front end, analog-to-digital converter (ADC) (or digital-to-analog converter (DAC) for transmitting), a type of digital signal processing (DSP) and finally a backhaul for the data to be passed to another system.
The digital processor on the system can have a significant impact on the capabilities, power consumption, and cost. There are three typical options when designing DSP for SDRs, dedicated DSP Processors, General Purpose Processors (GPPs)/CPUs, and field-programmable gate arrays (FPGAs), each again having advantages and disadvantages. DSP processors tend to have high signal processing capabilities but fixed architectures which limit flexibility and utility depending on the application. GPPs/CPUs share a similar advantage and disadvantage list as DSP processors and offer substantial real-time signal-processing and capabilities (including for other tasks not associated with signal-processing) but are again faced with challenges when it comes to flexibility and the ability to be easily re-configured. The third option, and usually the most common for SDR architectures, are FPGAs. FPGAs offer many benefits over dedicated DSP processors and GPPs/CPUs including the ability to execute multiple actions in parallel, optimization for cost/performance tradeoffs, and possibly the most significant advantage being the flexibility enabling users to dynamically adjust as needed. This is further augmented by a combination of FPGA and CPU, called an FPGA SoC (silicon-on-chip) which has made a significant impact on the market and provides the best of both worlds. An example of how this architecture may look is visible in Figure 2.
The digital backhaul is an important aspect to consider in designing an SDR as it is the only way to pass data to and from other systems. Similar to the RF and DSP sides of an SDR, there are multiple options and configurations possible. The digital backhaul links the processor to external equipment and it is therefore important to consider available options based on processor capacity. The three most common backhaul options for SDRs are PCIe, 1G Ethernet, and 10G Ethernet. Each of these offer various speed, latency, and compatibility aspects which, depending on the application, can be regarded as positive features or negative features. PCIe interface SDRs will traditionally be smaller in form factor and designed to fit within a host computer, while 1G and 10G systems will generally be larger but offer increased throughput and lower latency.
To help address these and other design considerations, Per Vices has launched a new tool named Build Your Own SDR (www.pervices.com/custom) where system designers can adjust various parameters and receive a real-time hardware cost estimate based on the selection. This tool provides transparency to the wireless market on the main cost drivers in wireless designs and builds on Per Vices vast experience in developing wireless systems to meet the needs of all types of markets.
Designing wireless systems can be challenging with many aspects to consider, each of which are likely to impact one another. There are RF performance, processor, and digital backhaul considerations that must be investigated thoroughly throughout the design process. Fortunately for system designers, RF and digital engineers, and system integrators, there is a Build Your Own SDR tool available to assist in making those decisions to meet requirements in the most cost effective approach.
About the Author
Brandon Malatest is co-founder and COO of Per Vices Corp., a Canadian company developing high performance software defined radio (SDR) platforms that are designed to meet and exceed requirements across multiple markets. Brandon holds an Honours Physics degree from the University of Waterloo, where he spent the majority of his time in experimental physics. Previously, he worked as a research analyst at one of the largest market research firms in Canada.